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Subject[PATCH v4 07/15] drm: bridge/dw_hdmi: set ncts_atomic_write & cts_manual
Date
From: Daniel Kurtz <djkurtz@chromium.org>

The ncts_atomic_write & cts_manual bits are present when design id
equal to 0x20.

After setting ncts_atomic_write, new N and CTS values are only used when
aud_n1 register is updated.

After setting cts_manual, new CTS value can set by AUD_CTS registers.

Signed-off-by: Yakir Yang <ykk@rock-chips.com>
---
Changes in v4:
- Combine N3 registers setting

Changes in v3:
- Set ncts_atomic_write & cts_manual

Changes in v2: None

drivers/gpu/drm/bridge/dw_hdmi.c | 10 +++++++++-
drivers/gpu/drm/bridge/dw_hdmi.h | 4 ++++
2 files changed, 13 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/bridge/dw_hdmi.c b/drivers/gpu/drm/bridge/dw_hdmi.c
index 12d8b7e..001e5ab 100644
--- a/drivers/gpu/drm/bridge/dw_hdmi.c
+++ b/drivers/gpu/drm/bridge/dw_hdmi.c
@@ -199,8 +199,15 @@ static void hdmi_mask_writeb(struct dw_hdmi *hdmi, u8 data, unsigned int reg,
static void hdmi_set_clock_regenerator(struct dw_hdmi *hdmi,
unsigned int n, unsigned int cts)
{
+ u8 n3 = 0;
u8 cts3 = 0;

+ /* First set NCTS_ATOMIC_WRITE (if present) */
+ if (hdmi->id.design == 0x20) {
+ n3 = HDMI_AUD_N3_NCTS_ATOMIC_WRITE;
+ hdmi_writeb(hdmi, n3, HDMI_AUD_N3);
+ }
+
/* set CTS_MANUAL (if present) */
if (hdmi->id.design == 0x20)
cts3 = HDMI_AUD_CTS3_CTS_MANUAL;
@@ -214,7 +221,8 @@ static void hdmi_set_clock_regenerator(struct dw_hdmi *hdmi,
hdmi_writeb(hdmi, cts & 0xff, HDMI_AUD_CTS1);

/* write N values; N1 must be written last */
- hdmi_writeb(hdmi, (n >> 16) & 0xf, HDMI_AUD_N3);
+ n3 |= (n >> 16) & HDMI_AUD_N3_AUDN19_16_MASK;
+ hdmi_writeb(hdmi, n3, HDMI_AUD_N3);
hdmi_writeb(hdmi, (n >> 8) & 0xff, HDMI_AUD_N2);
hdmi_writeb(hdmi, n & 0xff, HDMI_AUD_N1);
}
diff --git a/drivers/gpu/drm/bridge/dw_hdmi.h b/drivers/gpu/drm/bridge/dw_hdmi.h
index c7ac538..8e5ad50 100644
--- a/drivers/gpu/drm/bridge/dw_hdmi.h
+++ b/drivers/gpu/drm/bridge/dw_hdmi.h
@@ -907,6 +907,10 @@ enum {
HDMI_PHY_I2CM_CTLINT_ADDR_ARBITRATION_POL = 0x08,
HDMI_PHY_I2CM_CTLINT_ADDR_ARBITRATION_MASK = 0x04,

+/* AUD_N3 field values */
+ HDMI_AUD_N3_NCTS_ATOMIC_WRITE = 0x80,
+ HDMI_AUD_N3_AUDN19_16_MASK = 0x0f,
+
/* AUD_CTS3 field values */
HDMI_AUD_CTS3_N_SHIFT_OFFSET = 5,
HDMI_AUD_CTS3_N_SHIFT_MASK = 0xe0,
--
2.1.2



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