Messages in this thread | | | Date | Tue, 24 Feb 2015 00:56:50 +0000 (GMT) | From | "Maciej W. Rozycki" <> | Subject | Re: [RFC PATCH] x86, fpu: Use eagerfpu by default on all CPUs |
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On Mon, 23 Feb 2015, Linus Torvalds wrote:
> We have one traditional special case, which actually did something > like Maciej's nightmare scenario: the completely broken "FPU errors > over irq13" IBM PC/AT FPU linkage. > > But since we don't actually support old i386 machines any more, we > don't really need to care. The only way you can get into that > situation is with an external i387. I don't think we need to worry > about it. > > But with the old horrid irq13 error handling, you literally could get > into a situation that you got an error "exception" (irq) from the > previous state, *after* you had already switched to the new one. We > had some code to mitigate the problem, but as mentioned, I don't think > it's an issue any more.
Correct, the horrid hack is gone, it was so horrible (though I understand why IBM had to do it with their PC/AT) that back in mid 1990s, some 10 years after the inception of the problem, Intel felt so compelled to make people get the handling of it right as to release a dedicated application note: "AP-578 Software and Hardware Considerations for FPU Exception Handlers for Intel Architecture Processors", Order Number 243291-002.
Anyway, my point through this consideration has been about the performance benefit from continuing the execution of an x87 instruction in parallel, perhaps until after a context has been fully switched. Which benefit is lost if a FSAVE/FXSAVE executed eagerly at the context switch stalls waiting for the instruction to complete instead.
Maciej
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