lkml.org 
[lkml]   [2015]   [Feb]   [11]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
/
Date
From
SubjectRe: [PATCH v3 2/2] x86: Add support for the clwb instruction
On 01/27/2015 08:53 AM, Ross Zwisler wrote:
> Add support for the new clwb (cache line write back) instruction. This
> instruction was announced in the document "Intel Architecture
> Instruction Set Extensions Programming Reference" with reference number
> 319433-022.
>
> https://software.intel.com/sites/default/files/managed/0d/53/319433-022.pdf
>
> The clwb instruction is used to write back the contents of dirtied cache
> lines to memory without evicting the cache lines from the processor's
> cache hierarchy. This should be used in favor of clflushopt or clflush
> in cases where you require the cache line to be written to memory but
> plan to access the data again in the near future.
>
> One of the main use cases for this is with persistent memory where clwb
> can be used with pcommit to ensure that data has been accepted to memory
> and is durable on the DIMM.

Acked-by: H. Peter Anvin <hpa@linux.intel.com>




\
 
 \ /
  Last update: 2015-02-11 23:41    [W:0.196 / U:0.320 seconds]
©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site