lkml.org 
[lkml]   [2015]   [Dec]   [4]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
Patch in this message
/
From
Subject[PATCH 1/3] clk: tegra: Fix sparse warning for pll_m
Date
Sparse generates the following warning for the pll_m params structure:

drivers/clk/tegra/clk-tegra210.c:1569:10: warning: Initializer entry
defined twice
drivers/clk/tegra/clk-tegra210.c:1570:10: also defined here

Fix this by correcting the index for the MISC1 register.

Fixes: b31eba5ff3f7 ("clk: tegra: Add support for Tegra210 clocks")

Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
---
drivers/clk/tegra/clk-tegra210.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/clk/tegra/clk-tegra210.c b/drivers/clk/tegra/clk-tegra210.c
index 58514c44ea83..3bd831c2b9db 100644
--- a/drivers/clk/tegra/clk-tegra210.c
+++ b/drivers/clk/tegra/clk-tegra210.c
@@ -1567,7 +1567,7 @@ static struct tegra_clk_pll_params pll_m_params = {
.iddq_bit_idx = PLLM_IDDQ_BIT,
.max_p = PLL_QLIN_PDIV_MAX,
.ext_misc_reg[0] = PLLM_MISC0,
- .ext_misc_reg[0] = PLLM_MISC1,
+ .ext_misc_reg[1] = PLLM_MISC1,
.round_p_to_pdiv = pll_qlin_p_to_pdiv,
.pdiv_tohw = pll_qlin_pdiv_to_hw,
.div_nmp = &pllm_nmp,
--
2.1.4


\
 
 \ /
  Last update: 2015-12-04 18:21    [from the cache]
©2003-2020 Jasper Spaans|hosted at Digital Ocean and my Meterkast|Read the blog