Messages in this thread | | | From | Heiko Stübner <> | Subject | Re: [PATCH v4] clk: rockchip: switch PLLs to slow mode before reboot for rk3288 | Date | Tue, 01 Dec 2015 19:25:24 +0100 |
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Am Freitag, 27. November 2015, 10:09:30 schrieb Chris Zhong: > We've been seeing some crashes at reboot test on rk3288-based systems, > which boards have not reset pin connected to NPOR, they reboot by > setting 0xfdb9 to RK3288_GLB_SRST_FST register. If the APLL works in > a high frequency mode, some IPs might hang during soft reset. > It appears that we can fix the problem by switching to slow mode before > reboot, just like what we did before suspend. > > Signed-off-by: Chris Zhong <zyw@rock-chips.com> > Reviewed-by: Heiko Stuebner <heiko@sntech.de>
applied to my clock branch for 4.5
Thanks Heiko
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