Messages in this thread | | | Date | Fri, 6 Nov 2015 14:29:53 +0100 | From | Thierry Reding <> | Subject | Re: [PATCH 1/3] pwm: lpss: Add support for multiple PWMs |
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On Tue, Oct 20, 2015 at 04:53:05PM +0300, Mika Westerberg wrote: > New Intel SoCs such as Broxton will have four PWMs per PCI (or ACPI) > device. Each PWM has 1k of register space allocated from the parent device. > Add support for this. > > Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> > --- > drivers/pwm/pwm-lpss.c | 48 +++++++++++++++++++++++++++--------------------- > drivers/pwm/pwm-lpss.h | 1 + > 2 files changed, 28 insertions(+), 21 deletions(-)
Applied all three patches, with a minor cleanup, see below.
> diff --git a/drivers/pwm/pwm-lpss.h b/drivers/pwm/pwm-lpss.h > index aa041bb1b67d..ef2419f47c57 100644 > --- a/drivers/pwm/pwm-lpss.h > +++ b/drivers/pwm/pwm-lpss.h > @@ -20,6 +20,7 @@ struct pwm_lpss_chip; > > struct pwm_lpss_boardinfo { > unsigned long clk_rate; > + size_t npwm; > };
I changed the type of npwm to unsigned int to match the definition of the pwm_chip.npwm field.
Thanks, Thierry [unhandled content-type:application/pgp-signature] | |