Messages in this thread | | | Date | Mon, 2 Nov 2015 14:45:22 +0000 | From | Will Deacon <> | Subject | Re: [PATCH v6 1/6] arm/arm64: add smccc |
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On Mon, Nov 02, 2015 at 02:03:13PM +0000, Mark Rutland wrote: > > > > +/** > > > > + * struct smccc_res - Result from SMC/HVC call > > > > + * @a0-a3 result values from registers 0 to 3 > > > > + */ > > > > +struct smccc_res { > > > > + unsigned long a0; > > > > + unsigned long a1; > > > > + unsigned long a2; > > > > + unsigned long a3; > > > > +}; > > > > > > Are there any endianness considerations for this structure? > > > > No, I can't find anything in the ARM SMC Calling Convention document > > indicating that. > > The calling conventions have no bearing on the structure, which is our > invention. > > We stash register values (which don't have endianness) returned by the > firmeware into the structure in the sequences above (which appear > endian-clean to me).
Ah yes, the structure is populated by the kernel not the firmware, so there's nothing to worry about. Thanks for the explanation.
Will
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