Messages in this thread | | | Date | Mon, 2 Nov 2015 10:14:40 +0100 | From | Peter Zijlstra <> | Subject | Re: [PATCH powerpc/next 2/2] powerpc: Make {cmp}xchg* and their atomic_ versions fully ordered |
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On Mon, Nov 02, 2015 at 09:30:32AM +0800, Boqun Feng wrote: > According to memory-barriers.txt, xchg*, cmpxchg* and their atomic_ > versions all need to be fully ordered, however they are now just > RELEASE+ACQUIRE, which are not fully ordered. > > So also replace PPC_RELEASE_BARRIER and PPC_ACQUIRE_BARRIER with > PPC_ATOMIC_ENTRY_BARRIER and PPC_ATOMIC_EXIT_BARRIER in > __{cmp,}xchg_{u32,u64} respectively to guarantee fully ordered semantics > of atomic{,64}_{cmp,}xchg() and {cmp,}xchg(), as a complement of commit > b97021f85517 ("powerpc: Fix atomic_xxx_return barrier semantics") > > This patch depends on patch "powerpc: Make value-returning atomics fully > ordered" for PPC_ATOMIC_ENTRY_BARRIER definition. > > Cc: <stable@vger.kernel.org> # 3.4+ > Signed-off-by: Boqun Feng <boqun.feng@gmail.com>
Acked-by: Peter Zijlstra (Intel) <peterz@infradead.org>
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