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    SubjectRe: [PATCH 01/25] serial: sh-sci: Update DT binding documentation for external clock input
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    Hi Geert,

    On Thursday 19 November 2015 22:19:14 Laurent Pinchart wrote:
    > On Thursday 19 November 2015 19:38:40 Geert Uytterhoeven wrote:
    > > Amend the DT bindings to include the optional external clock on
    > > (H)SCI(F) and some SCIFA, where this pin can serve as a clock input,
    > > depending on board wiring.
    > >
    > > Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
    > > Cc: devicetree@vger.kernel.org
    > > ---
    > >
    > > Documentation/devicetree/bindings/serial/renesas,sci-serial.txt | 3 +++
    > > 1 file changed, 3 insertions(+)
    > >
    > > diff --git
    > > a/Documentation/devicetree/bindings/serial/renesas,sci-serial.txt
    > > b/Documentation/devicetree/bindings/serial/renesas,sci-serial.txt index
    > > 2c9e6b8477e92792..8efc9b6f35637fbb 100644
    > > --- a/Documentation/devicetree/bindings/serial/renesas,sci-serial.txt
    > > +++ b/Documentation/devicetree/bindings/serial/renesas,sci-serial.txt
    > >
    > > @@ -43,6 +43,9 @@ Required properties:
    > > - clocks: Must contain a phandle and clock-specifier pair for each
    > > entry
    > >
    > > in clock-names.
    > >
    > > - clock-names: Must contain "fck" for the SCIx UART functional clock.
    > >
    > > + On (H)SCI(F) and some SCIFA, an additional clock may be specified:
    > Could you list the SCIFA variants that support external clocks ?
    >
    > > + - "hsck" for the optional external clock input (on HSCIF),
    > > + - "sck" for the optional external clock input (on other variants).

    Additionally, those clocks are used as inputs to the baud rate generator for
    external clocks, as the ones listed in patch 02/25 in this series. I'd merge
    the two patches and clarify the wording.

    > > Note: Each enabled SCIx UART should have an alias correctly numbered in
    > > the "aliases" node.

    --
    Regards,

    Laurent Pinchart



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