Messages in this thread | | | Date | Wed, 28 Oct 2015 10:39:37 +0000 | From | Will Deacon <> | Subject | Re: Q: schedule() and implied barriers on arm64 |
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On Tue, Oct 27, 2015 at 07:40:20PM +0100, Peter Zijlstra wrote: > On Tue, Oct 27, 2015 at 04:19:48PM +0000, Will Deacon wrote: > > ... and the 'normal' code will have a control hazard somewhere, followed > > by the implicit ISB in exception return, so there's a barrier of sorts > > there too. > > Which exception return?
The return to userspace after the interrupt/fault/system call that got us into the kernel.
> > The problem is that people say "full barrier" without defining what it > > really means, and we end up going round the houses on things like > > transitivity (which ctrl + isb doesn't always give you). > > I pretty much meant smp_mb() here :-)
In which case, we don't provide the transitivity guarantees that you would get from an smp_mb().
Will
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