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SubjectRe: [PATCH 5/6] ARM: dts: sunxi: Add Allwinner H3 DTSI
On Sat, Oct 24, 2015 at 10:47:49AM +0200, Jean-Francois Moine wrote:
> On Sat, 24 Oct 2015 09:13:28 +0200
> Maxime Ripard <maxime.ripard@free-electrons.com> wrote:
>
> > Or simply
> >
> > bus_gates {
> > clocks = <&ahb1>, <&ahb2>;
> > clock-indices = <5>, <6>, <8>, ...
> > clock-output-names = "bus_ce", "bus_dma", "bus_mmc0"
> > };
>
> I don't understand: the apb1, apb2, ahb1 and ahb2 clocks may be
> programmed independently to different frequencies

I don't understand why you're talking about frequencies here.

> and you have to know which of them is the parent of each leaf clock.

Indeed, but that's also doable here. Just not in the DT.

> So, either you hard-code the parents as Jens did in a first proposal,
> or you define the full list of parents in the DT as in the last
> proposal, or you use a container per parent in the DT as I proposed.
>
> There could be an other solution using the output clock name to define
> the parent clock:
>
> bus_gates {
> clocks = <&ahb1>, <&ahb2>, <&apb1>, <&apb2>;
> clock-indices = <5>, <6>, <8>, ...
> clock-output-names = "ahb1_ce", "ahb1_dma", "ahb1_mmc0"
> };
>
> with the documentation:
>
> "the clocks MUST be defined in order: ahb1, ahb2, apb1, apb2."
>
> and the code
>
> if (strncmp(clock_name, "ahb1", 4) == 0)
> clk_parent = of_clk_get_parent_name(node, 0);
> else if (..)
>
> but it seems a bit hacky.

It's exactly what I suggested, without the string comparison, but
relying on the ID instead.

Maxime

--
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
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