Messages in this thread | | | Subject | Re: [dpdk-dev] [PATCH 2/2] uio: new driver to support PCI MSI-X | From | Alexander Duyck <> | Date | Thu, 1 Oct 2015 19:33:13 -0700 |
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On 10/01/2015 05:04 PM, Stephen Hemminger wrote: > On Thu, 1 Oct 2015 16:40:10 -0700 > Alexander Duyck <alexander.duyck@gmail.com> wrote: > >> Do you really need to map IORESOURCE bars? Most drivers I can think of >> don't use IO BARs anymore. Maybe we could look at just dropping the >> code and adding it back later if we have a use case that absolutely >> needs it. > Mapping is not strictly necessary, but for virtio it acts a way to communicate > the regions.
I think I see what you are saying. I was hoping we could get away from having to map any I/O ports but it looks like virtio is still using them for BAR 0, or at least that is what I am seeing on my VM with virtio_net. I was really hoping we could get away from that since a 16b address space is far too restrictive anyway.
>> Also how many devices actually need resources beyond BAR 0? I'm just >> curious as I know BAR 2 on many of the Intel devices is the register >> space related to MSI-X so now we have both the PCIe subsystem and user >> space with access to this region. > VMXNet3 needs 2 bars. Most use only one.
So essentially we are needing to make exceptions for the virtual interfaces.
I guess there isn't much we can do then and we probably need to map any and all base address registers we can find for the given device. I was hoping for something a bit more surgical since we are opening a security hole of sorts, but I guess it can't be helped if we want to support multiple devices and they all have such radically different configurations.
- Alex
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