Messages in this thread | | | Date | Sat, 31 Jan 2015 15:28:27 -0400 | From | Eduardo Valentin <> | Subject | Re: [PATCH v2 2/3] Documentation: DT bindings: add more Tegra chip compatible strings |
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Hey Paul!
On Fri, Jan 30, 2015 at 03:11:04PM -0700, Paul Walmsley wrote: > Align compatible strings for several IP blocks present on Tegra chips > with the latest doctrine from the DT maintainers: > > http://marc.info/?l=devicetree&m=142255654213019&w=2 > > The primary objective here is to avoid checkpatch warnings, per: > > http://marc.info/?l=linux-tegra&m=142201349727836&w=2 > > DT binding text files have been updated for the following IP blocks: > > - PCIe > - SOR > - SoC timers > - AHB "gizmo" > - APB_MISC > - pinmux control > - UART > - PWM > - I2C > - SPI > - RTC > - PMC > - eFuse > - AHCI > - HDA > - XUSB_PADCTRL > - SDHCI > - SOC_THERM > - AHUB > - I2S > - EHCI > - USB PHY > > N.B. The nvidia,tegra20-timer compatible string is removed from the > nvidia,tegra30-timer.txt documentation file because it's already > mentioned in the nvidia,tegra20-timer.txt documentation file. > > This second version takes into account the following requests from > Rob Herring <robherring2@gmail.com>: > > - Per-IP block patches have been combined into a single patch > > - Explicit documentation about which compatible strings are actually > matched by the driver has been removed. In its place is implicit > documentation that loosely follows Rob's prescribed format: > > "Must contain '"nvidia,<chip>-pcie", "nvidia,tegra20-pcie"' where > <chip> is tegra30, tegra132, ..." [...] "You should attempt to > document known values of <chip> if you use it" > > > Signed-off-by: Paul Walmsley <paul@pwsan.com> > Cc: Alexandre Courbot <gnurou@gmail.com> > Cc: Dylan Reid <dgreid@chromium.org> > Cc: Eduardo Valentin <edubezval@gmail.com> > Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> > Cc: Hans de Goede <hdegoede@redhat.com> > Cc: Ian Campbell <ijc+devicetree@hellion.org.uk> > Cc: Jingchang Lu <jingchang.lu@freescale.com> > Cc: John Crispin <blogic@openwrt.org> > Cc: Kumar Gala <galak@codeaurora.org> > Cc: Linus Walleij <linus.walleij@linaro.org> > Cc: Mark Rutland <mark.rutland@arm.com> > Cc: Mikko Perttunen <mperttunen@nvidia.com> > Cc: Murali Karicheri <m-karicheri2@ti.com> > Cc: Paul Walmsley <pwalmsley@nvidia.com> > Cc: Pawel Moll <pawel.moll@arm.com> > Cc: Peter De Schrijver <pdeschrijver@nvidia.com> > Cc: Peter Hurley <peter@hurleysoftware.com> > Cc: Rob Herring <robh+dt@kernel.org> > Cc: Sean Paul <seanpaul@chromium.org> > Cc: Stephen Warren <swarren@wwwdotorg.org> > Cc: Takashi Iwai <tiwai@suse.de> > Cc: Tejun Heo <tj@kernel.org> > Cc: "Terje Bergström" <tbergstrom@nvidia.com> > Cc: Thierry Reding <thierry.reding@gmail.com> > Cc: Tuomas Tynkkynen <ttynkkynen@nvidia.com> > Cc: Wolfram Sang <wsa@the-dreams.de> > Cc: Zhang Rui <rui.zhang@intel.com> > Cc: dri-devel@lists.freedesktop.org > Cc: linux-i2c@vger.kernel.org > Cc: linux-kernel@vger.kernel.org > Cc: linux-pci@vger.kernel.org > Cc: linux-pm@vger.kernel.org > Cc: linux-pwm@vger.kernel.org > Cc: linux-tegra@vger.kernel.org > --- > .../bindings/arm/tegra/nvidia,tegra20-ahb.txt | 5 ++++- > .../bindings/arm/tegra/nvidia,tegra20-pmc.txt | 6 +++++- > .../devicetree/bindings/ata/tegra-sata.txt | 4 +++- > .../bindings/fuse/nvidia,tegra20-fuse.txt | 10 +++++----- > .../bindings/gpu/nvidia,tegra20-host1x.txt | 8 ++++++-- > .../devicetree/bindings/i2c/nvidia,tegra20-i2c.txt | 10 +++++----- > .../bindings/misc/nvidia,tegra20-apbmisc.txt | 9 ++++----- > .../bindings/mmc/nvidia,tegra20-sdhci.txt | 6 +++++- > .../bindings/pci/nvidia,tegra20-pcie.txt | 8 ++++---- > .../bindings/pinctrl/nvidia,tegra124-pinmux.txt | 3 ++- > .../pinctrl/nvidia,tegra124-xusb-padctl.txt | 4 +++- > .../devicetree/bindings/pwm/nvidia,tegra20-pwm.txt | 7 ++++--- > .../devicetree/bindings/rtc/nvidia,tegra20-rtc.txt | 4 +++- > .../devicetree/bindings/serial/of-serial.txt | 5 ++++- > .../bindings/sound/nvidia,tegra30-ahub.txt | 5 ++++- > .../bindings/sound/nvidia,tegra30-hda.txt | 4 +++- > .../bindings/sound/nvidia,tegra30-i2s.txt | 5 ++++- > .../bindings/spi/nvidia,tegra114-spi.txt | 4 +++- > .../devicetree/bindings/thermal/tegra-soctherm.txt | 4 +++-
<cut>
> diff --git a/Documentation/devicetree/bindings/thermal/tegra-soctherm.txt b/Documentation/devicetree/bindings/thermal/tegra-soctherm.txt > index ecf3ed76cd46..6b68cd150405 100644 > --- a/Documentation/devicetree/bindings/thermal/tegra-soctherm.txt > +++ b/Documentation/devicetree/bindings/thermal/tegra-soctherm.txt > @@ -7,7 +7,9 @@ notifications. It is also used to manage emergency shutdown in an > overheating situation. > > Required properties : > -- compatible : "nvidia,tegra124-soctherm". > +- compatible : For Tegra124, must contain "nvidia,tegra124-soctherm". > + For Tegra132, must contain "nvidia,tegra132-soctherm". > + For Tegra210, must contain "nvidia,tegra210-soctherm". > - reg : Should contain 1 entry: > - SOCTHERM register set > - interrupts : Defines the interrupt used by SOCTHERM
Considering that this is going into a single patch, you may add my
Acked-by: Eduardo Valentin <edubezval@gmail.com>
for what concerns the thermal bindings.
Cheers,
Eduardo Valentin [unhandled content-type:application/pgp-signature] | |