Messages in this thread Patch in this message | | | From | Chenhui Zhao <> | Subject | [PATCH 2/4] arm: ls1021a: add dts nodes required by deep sleep | Date | Fri, 30 Jan 2015 20:22:19 +0800 |
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Add RCPM and DCSR nodes.
Signed-off-by: Chenhui Zhao <chenhui.zhao@freescale.com> --- arch/arm/boot/dts/ls1021a-qds.dts | 6 +- arch/arm/boot/dts/ls1021a.dtsi | 117 ++++++++++++++++++++++++++++++++++++++ 2 files changed, 122 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/ls1021a-qds.dts b/arch/arm/boot/dts/ls1021a-qds.dts index 9c5e16b..6903f43 100644 --- a/arch/arm/boot/dts/ls1021a-qds.dts +++ b/arch/arm/boot/dts/ls1021a-qds.dts @@ -157,7 +157,7 @@ fpga: board-control@3,0 { #address-cells = <1>; #size-cells = <1>; - compatible = "simple-bus"; + compatible = "fsl,ls1021aqds-fpga", "simple-bus"; reg = <0x3 0x0 0x0000100>; bank-width = <1>; device-width = <1>; @@ -238,3 +238,7 @@ &uart1 { status = "okay"; }; + +&rcpm { + fsl,deep-sleep; +}; diff --git a/arch/arm/boot/dts/ls1021a.dtsi b/arch/arm/boot/dts/ls1021a.dtsi index c70bb27..0c51ce0 100644 --- a/arch/arm/boot/dts/ls1021a.dtsi +++ b/arch/arm/boot/dts/ls1021a.dtsi @@ -183,6 +183,11 @@ }; }; + rcpm: rcpm@1ee2000 { + compatible = "fsl,ls1021a-rcpm", "fsl,qoriq-rcpm-2.1"; + reg = <0x0 0x1ee2000 0x0 0x10000>; + }; + dspi0: dspi@2100000 { compatible = "fsl,vf610-dspi"; #address-cells = <1>; @@ -406,4 +411,116 @@ dr_mode = "host"; }; }; + + dcsr { + #address-cells = <1>; + #size-cells = <1>; + compatible = "fsl,dcsr", "simple-bus"; + ranges = <0x0 0x0 0x20000000 0x1000000>; + + dcsr-epu@0 { + compatible = "fsl,ls1021a-dcsr-epu"; + reg = <0x0 0x10000>; + }; + + dcsr-gdi@100000 { + compatible = "fsl,ls1021a-dcsr-gdi"; + reg = <0x100000 0x10000>; + }; + + dcsr-dddi@120000 { + compatible = "fsl,ls1021a-dcsr-dddi"; + reg = <0x120000 0x10000>; + }; + + dcsr-dcfg@220000 { + compatible = "fsl,ls1021a-dcsr-dcfg"; + reg = <0x220000 0x1000>; + }; + + dcsr-clock@221000 { + compatible = "fsl,ls1021a-dcsr-clock"; + reg = <0x221000 0x1000>; + }; + + dcsr-rcpm@222000 { + compatible = "fsl,ls1021a-dcsr-rcpm"; + reg = <0x222000 0x1000 0x223000 0x1000>; + }; + + dcsr-ccp@225000 { + compatible = "fsl,ls1021a-dcsr-ccp"; + reg = <0x225000 0x1000>; + }; + + dcsr-fusectrl@226000 { + compatible = "fsl,ls1021a-dcsr-fusectrl"; + reg = <0x226000 0x1000>; + }; + + dcsr-dap@300000 { + compatible = "fsl,ls1021a-dcsr-dap"; + reg = <0x300000 0x10000>; + }; + + dcsr-cstf@350000 { + compatible = "fsl,ls1021a-dcsr-cstf"; + reg = <0x350000 0x1000 0x3a7000 0x1000>; + }; + + dcsr-a7rom@360000 { + compatible = "fsl,ls1021a-dcsr-a7rom"; + reg = <0x360000 0x10000>; + }; + + dcsr-a7cpu@370000 { + compatible = "fsl,ls1021a-dcsr-a7cpu"; + reg = <0x370000 0x8000>; + }; + + dcsr-a7cti@378000 { + compatible = "fsl,ls1021a-dcsr-a7cti"; + reg = <0x378000 0x4000>; + }; + + dcsr-etm@37c000 { + compatible = "fsl,ls1021a-dcsr-etm"; + reg = <0x37c000 0x1000 0x37d000 0x3000>; + }; + + dcsr-hugorom@3a0000 { + compatible = "fsl,ls1021a-dcsr-hugorom"; + reg = <0x3a0000 0x1000>; + }; + + dcsr-etf@3a1000 { + compatible = "fsl,ls1021a-dcsr-etf"; + reg = <0x3a1000 0x1000 0x3a2000 0x1000>; + }; + + dcsr-etr@3a3000 { + compatible = "fsl,ls1021a-dcsr-etr"; + reg = <0x3a3000 0x1000>; + }; + + dcsr-cti@3a4000 { + compatible = "fsl,ls1021a-dcsr-cti"; + reg = <0x3a4000 0x1000 0x3a5000 0x1000 0x3a6000 0x1000>; + }; + + dcsr-atbrepl@3a8000 { + compatible = "fsl,ls1021a-dcsr-atbrepl"; + reg = <0x3a8000 0x1000>; + }; + + dcsr-tsgen-ctrl@3a9000 { + compatible = "fsl,ls1021a-dcsr-tsgen-ctrl"; + reg = <0x3a9000 0x1000>; + }; + + dcsr-tsgen-read@3aa000 { + compatible = "fsl,ls1021a-dcsr-tsgen-read"; + reg = <0x3aa000 0x1000>; + }; + }; }; -- 1.9.1
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