Messages in this thread | | | Date | Tue, 27 Jan 2015 12:35:48 +0000 | From | Zubair Lutfullah Kakakhel <> | Subject | Re: [PATCH_V3 4/4] sound: jz4740: set i2s clk rate to 12MHz |
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On 26/01/15 14:53, Zubair Lutfullah Kakakhel wrote: > i2s clock rate is not set to 12MHz currently. Set it before enabling > the clock. > > Signed-off-by: Zubair Lutfullah Kakakhel <Zubair.Kakakhel@imgtec.com> > > --- > V2 changes: Removed clk_prepare_enable call as clock was already being > enabled elsewhere. Just set rate to 12MHz. > --- > sound/soc/jz4740/jz4740-i2s.c | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/sound/soc/jz4740/jz4740-i2s.c b/sound/soc/jz4740/jz4740-i2s.c > index 07f7781..c2e5852 100644 > --- a/sound/soc/jz4740/jz4740-i2s.c > +++ b/sound/soc/jz4740/jz4740-i2s.c > @@ -125,6 +125,7 @@ static int jz4740_i2s_startup(struct snd_pcm_substream *substream, > ctrl |= JZ_AIC_CTRL_FLUSH; > jz4740_i2s_write(i2s, JZ_REG_AIC_CTRL, ctrl); > > + clk_set_rate(i2s->clk_i2s, 12000000);
Lars recommended using dt and assigned-clock-rates for this. (irc) I've checked and it can be done.
This patch is not needed.
Patch 1-3 in this series are OK. This last one can be skipped.
Do you want me to repost the series without it? Or is this fine?
Thanks, ZubairLK
> clk_prepare_enable(i2s->clk_i2s); > > conf = jz4740_i2s_read(i2s, JZ_REG_AIC_CONF); >
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