Messages in this thread | | | Date | Mon, 26 Jan 2015 09:01:37 -0800 | Subject | Re: [PATCH 1/2] watchdog: dw_wdt: pat the watchdog before enabling it | From | Doug Anderson <> |
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Jisheng,
On Sun, Jan 25, 2015 at 10:22 PM, Jisheng Zhang <jszhang@marvell.com> wrote: >> Specifically I see the register WDT_TORR that has an offset of 0x4. >> That's the RANGE_REG in your code. It shows bits 3:0 set the timeout >> period (0 = 0xffff and 15 = 0x7fffffff). It shows bits 31:4 as >> "reserved". > > Could you please dump registers' value at offset 0xf4 and 0xf8 if you don't mind?
Those are not documented in the user manual that I have, but:
>>> r(0xff8000f4) 0x10000a02 >>> r(0xff8000f8) 0x3130332a
-Doug
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