Messages in this thread | | | Date | Mon, 19 Jan 2015 21:00:06 +0300 | From | Dmitry Osipenko <> | Subject | Re: [PATCH] ARM: tegra20: Store CPU "resettable" status in IRAM |
| |
19.01.2015 20:45, Stephen Warren пишет: > On 01/19/2015 10:41 AM, Dmitry Osipenko wrote: >> 19.01.2015 20:26, Stephen Warren пишет: >>> Hopefully this works out. I suppose it's unlikely anyone will be >>> running code on >>> the AVP upstrem, so any potential conflict with AVP's usage of IRAM >>> isn't likely >>> to occur. >>> >> I don't see how it can conflict with AVP code. First KB of IRAM is >> reserved for reset handler. Am I missing something? >> >> From reset.h: >> >> /* The first 1K of IRAM is permanently reserved for the CPU reset >> handler */ > > I believe "CPU" in that context means AVP CPU. Still, I may not be correct, and > to be honest it's likely not too well defined even if that comment seems clear-cut. > Hmm... Suddenly I recalled that LP2 was always disabled in downstream kernel. I remember that I tried it once (couple years ago) and it didn't work, however I presume it was just broken. Now I don't feel good with it.
-- Dmitry
| |