Messages in this thread Patch in this message | | | Date | Tue, 30 Sep 2014 21:38:30 +0200 (CEST) | From | Thomas Gleixner <> | Subject | Re: [PATCH 2/3] x86: Quark: Update cache reporting, add Quark SoC X1000 string |
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On Tue, 30 Sep 2014, Bryan O'Donoghue wrote:
> Adds a path for legacy_cache_size to get a Quark SoC X1000 cache size > Update init_intel to take account of PIII Tualatin and Quark X1000 > reporting cache size via legacy_cache_size
I don't see any reference to PIII Tualatin in the patch itself.
> Add string to family/model structure for completeness and better > output of /proc/cpuinfo > > Signed-off-by: Bryan O'Donoghue <pure.logic@nexus-software.ie> > --- > arch/x86/kernel/cpu/intel.c | 20 ++++++++++++++++++-- > 1 file changed, 18 insertions(+), 2 deletions(-) > > diff --git a/arch/x86/kernel/cpu/intel.c b/arch/x86/kernel/cpu/intel.c > index 50ce751..686eae7 100644 > --- a/arch/x86/kernel/cpu/intel.c > +++ b/arch/x86/kernel/cpu/intel.c > @@ -396,7 +396,13 @@ static void init_intel(struct cpuinfo_x86 *c) > #endif > } > > - l2 = init_intel_cacheinfo(c); > + > + /* legacy_cache may have provided and cache_size already if not probe */
That comment took me some time to decode.
/* * If cache_size has not been initialized via legacy_cache() * probe it via init_intel_cacheinfo(). */
Perhaps?
> + if (c->x86_cache_size == 0) > + l2 = init_intel_cacheinfo(c); > + else > + l2 = c->x86_cache_size; > + > if (c->cpuid_level > 9) { > unsigned eax = cpuid_eax(10); > /* Check for version and the number of counters */ > @@ -500,6 +506,15 @@ static unsigned int intel_size_cache(struct cpuinfo_x86 *c, unsigned int size) > */ > if ((c->x86 == 6) && (c->x86_model == 11) && (size == 0)) > size = 256; > +
Stray extra newline
> + > + /* > + * Intel Quark SoC X1000 contains a 4-way set associative > + * 16K cache with a 16 byte cache line and 256 lines per tag > + */ > + if ((c->x86 == 5) && (c->x86_model == 9)) > + size = 16; > + > return size; > }
Thanks,
tglx
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