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SubjectRe: [PATCH 06/16] tty: serial: Add 8250-core based omap driver
On Wed, Sep 10, 2014 at 09:30:01PM +0200, Sebastian Andrzej Siewior wrote:
> + /*
> + * We enable TRIG_GRANU for RX and TX and additionaly we set
> + * SCR_TX_EMPTY bit. The result is the following:
> + * - RX_TRIGGER amount of bytes in the FIFO will cause an interrupt.
> + * - less than RX_TRIGGER number of bytes will also cause an interrupt
> + * once the UART decides that there no new bytes arriving.
> + * - Once THRE is enabled, the interrupt will be fired once the FIFO is
> + * empty - the trigger level is ignored here.
> + *
> + * Once DMA is enabled:
> + * - UART will assert the TX DMA line once there is room for TX_TRIGGER
> + * bytes in the TX FIFO. On each assert the DMA engine will move
> + * TX_TRIGGER bytes into the FIFO.
> + * - UART will assert the RX DMA line once there are RX_TRIGGER bytes in
> + * the FIFO and move RX_TRIGGER bytes.
> + * This is because treshold and trigger values are the same.

threshold

> + /*
> + * It claims to be 16C750 compatible however it is a little different.
> + * It has EFR and has no FCR7_64byte bit. The AFE (which it claims to
> + * have) is enabled via EFR instead of MCR. The type is set here 8250
> + * just to get things going. UNKNOWN does not work for a few reasons and
> + * we don't need our own type since we don't use 8250's set_termios()
> + * and our "bugs" are handeld via the bug member.

handled

> + */
> + up.port.type = PORT_8250;
> + up.port.iotype = UPIO_MEM;
> + up.port.flags = UPF_FIXED_PORT | UPF_FIXED_TYPE | UPF_SOFT_FLOW |
> + UPF_HARD_FLOW;
> + up.port.private_data = priv;
> +
> + up.port.regshift = 2;
> + up.port.fifosize = 64;
> + up.tx_loadsz = 64;
> + up.capabilities = UART_CAP_FIFO | UART_CAP_EFR | UART_CAP_SLEEP;
> +#ifdef CONFIG_PM_RUNTIME
> + /*
> + * PM_RUNTIME is mostly transparent. However to do it right we need to a

need to _do_ a ...?

> + * TX empty interrupt before we can put the device to auto idle. So if
> + * PM_RUNTIME is not enabled we don't add that flag and can spare that
> + * one extra interrupt in the TX path.
> + */

<snip>

> +config SERIAL_8250_OMAP
> + tristate "Support for OMAP internal UART (8250 based driver)"
> + depends on SERIAL_8250 && ARCH_OMAP2PLUS
> + help
> + If you have a machine based on an Texas Instruments OMAP CPU you
> + can enable its onboard serial ports by enabling this option.
> +
> + This driver is in early stage and uses ttyS instead of ttyO.
> +

I just wondered if this driver should be marked experimental?


Thanks,
Frans


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