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SubjectRe: [PATCH 2/2] perf, x86: Use INTEL_FLAGS_UEVENT_CONSTRAINT for PRECDIST
On Wed, Sep 10, 2014 at 10:37:14AM +0200, Stephane Eranian wrote:
> On Wed, Sep 10, 2014 at 9:59 AM, Peter Zijlstra <peterz@infradead.org> wrote:
> > On Wed, Sep 10, 2014 at 09:59:26AM +0200, Peter Zijlstra wrote:
> >> On Tue, Sep 09, 2014 at 05:49:08PM -0700, Andi Kleen wrote:
> >> > From: Andi Kleen <ak@linux.intel.com>
> >> >
> >> > The earlier commit 86a04461a made near all PEBS on
> >> > Sandy/IvyBridge/Haswell to reject non zero flags.
> >>
> >> What's magic about nehalem and westmere?
> >
> > And core2 and whatever else we support PEBS for, for that matter.
>
> nhm, wsm, core2 do not have precise distribution (PREC_DIST) umask to
> inst_Retired.

That was a comment to 86a04461a, I should have spotted it at the time.
There is no sane reason to only change PEBS for a subset of chips.

That needs to be fixed before I'll take anything else from Andi.

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