lkml.org 
[lkml]   [2014]   [Aug]   [18]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
    Patch in this message
    /
    From
    Subject[PATCH 3.11 030/137] irqchip: gic: Fix core ID calculation when topology is read from DT
    Date
    3.11.10.15 -stable review patch.  If anyone has any objections, please let me know.

    ------------------

    From: Tomasz Figa <t.figa@samsung.com>

    commit 29e697b11853d3f83b1864ae385abdad4aa2c361 upstream.

    Certain GIC implementation, namely those found on earlier, single
    cluster, Exynos SoCs, have registers mapped without per-CPU banking,
    which means that the driver needs to use different offset for each CPU.

    Currently the driver calculates the offset by multiplying value returned
    by cpu_logical_map() by CPU offset parsed from DT. This is correct when
    CPU topology is not specified in DT and aforementioned function returns
    core ID alone. However when DT contains CPU topology, the function
    changes to return cluster ID as well, which is non-zero on mentioned
    SoCs and so breaks the calculation in GIC driver.

    This patch fixes this by masking out cluster ID in CPU offset
    calculation so that only core ID is considered. Multi-cluster Exynos
    SoCs already have banked GIC implementations, so this simple fix should
    be enough.

    Reported-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
    Reported-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
    Signed-off-by: Tomasz Figa <t.figa@samsung.com>
    Fixes: db0d4db22a78d ("ARM: gic: allow GIC to support non-banked setups")
    Link: https://lkml.kernel.org/r/1405610624-18722-1-git-send-email-t.figa@samsung.com
    Signed-off-by: Jason Cooper <jason@lakedaemon.net>
    Signed-off-by: Luis Henriques <luis.henriques@canonical.com>
    ---
    drivers/irqchip/irq-gic.c | 5 ++++-
    1 file changed, 4 insertions(+), 1 deletion(-)

    diff --git a/drivers/irqchip/irq-gic.c b/drivers/irqchip/irq-gic.c
    index 97fd4bf56f3e..4e2347ad869d 100644
    --- a/drivers/irqchip/irq-gic.c
    +++ b/drivers/irqchip/irq-gic.c
    @@ -42,6 +42,7 @@
    #include <linux/irqchip/chained_irq.h>
    #include <linux/irqchip/arm-gic.h>

    +#include <asm/cputype.h>
    #include <asm/irq.h>
    #include <asm/exception.h>
    #include <asm/smp_plat.h>
    @@ -754,7 +755,9 @@ void __init gic_init_bases(unsigned int gic_nr, int irq_start,
    }

    for_each_possible_cpu(cpu) {
    - unsigned long offset = percpu_offset * cpu_logical_map(cpu);
    + u32 mpidr = cpu_logical_map(cpu);
    + u32 core_id = MPIDR_AFFINITY_LEVEL(mpidr, 0);
    + unsigned long offset = percpu_offset * core_id;
    *per_cpu_ptr(gic->dist_base.percpu_base, cpu) = dist_base + offset;
    *per_cpu_ptr(gic->cpu_base.percpu_base, cpu) = cpu_base + offset;
    }
    --
    1.9.1


    \
     
     \ /
      Last update: 2014-08-18 12:21    [W:4.163 / U:0.388 seconds]
    ©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site