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SubjectRe: [PATCH V4 1/2] perf ignore LBR and extra_regs.
On Tue, Jul 08, 2014 at 09:49:40AM -0700, kan.liang@intel.com wrote:
> --- a/arch/x86/kernel/cpu/perf_event.h
> +++ b/arch/x86/kernel/cpu/perf_event.h
> @@ -464,6 +464,12 @@ struct x86_pmu {
> */
> struct extra_reg *extra_regs;
> unsigned int er_flags;
> + /*
> + * EXTRA REG MSR can be accessed
> + * The extra registers are completely unrelated to each other.
> + * So it needs a flag for each extra register.
> + */
> + bool extra_msr_access[EXTRA_REG_MAX];
>
> /*
> * Intel host/guest support (KVM)

# pahole -C extra_reg arch/x86/kernel/cpu/perf_event_intel.o
struct extra_reg {
unsigned int event; /* 0 4 */
unsigned int msr; /* 4 4 */
u64 config_mask; /* 8 8 */
u64 valid_mask; /* 16 8 */
int idx; /* 24 4 */

/* size: 32, cachelines: 1, members: 5 */
/* padding: 4 */
/* last cacheline: 32 bytes */
};

There's still 4 empty bytes at the tail of extra_reg itself; would it
make sense to store the availability of the reg in there?

After all; the place we use it (x86_pmu_extra_regs) already has the
pointer to the structure.
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