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SubjectRe: [PATCH v1] gpio: keystone: add dsp gpio controller driver
On Thursday 24 July 2014 01:19 PM, Jassi Brar wrote:
> On 23 July 2014 20:40, Linus Walleij <> wrote:
>> On Wed, Jul 16, 2014 at 12:43 PM, Grygorii Strashko
>> <> wrote:
>>> From: Murali Karicheri <>
>>> On Keystone SOCs, ARM host can send interrupts to DSP cores using the
>>> DSP GPIO controller IP. Each DSP GPIO controller provides 28 IRQ signals for
>>> each DSP core. This is one of the component used by the IPC mechanism used
>>> on Keystone SOCs.
>>> Keystone 2 DSP GPIO controller has specific features:
>>> - each GPIO can be configured only as output pin;
>>> - setting GPIO value to 1 causes IRQ generation on target DSP core;
>>> - reading pin value returns 0 - if IRQ was handled or 1 - IRQ is still
>>> pending.
>>> Signed-off-by: Murali Karicheri <>
>>> Signed-off-by: Grygorii Strashko <>
>> Pardon me. How is this GENERAL PURPOSE Input/Output?
>> It seems very very much SPECIAL PURPOSE to me, it's like
>> you're just shoehorning some IPC mechanism into the GPIO
>> subsystem, and this may be because the datasheet calls it
>> GPIO when it's not.
>> What other stuff than DSP is connected to these lines, and is it
>> really even external lines? Aren't these just polysilicon rails
>> pretty much hammered to be used by the DSP and nothing else.
>> What is the difference between this and a mailbox IRQ line
>> and the kind of stuff handled by drivers/mailbox?
>> I'd like Suman and Jassi to have a look at this to see if it's
>> actually a mailbox before we proceed.
> The controller seems like most others, only incapable of reading
> signals (output only).
> The userspace driving those signals to communicate with a DSP isn't
> enough to call it a mailbox usecase, because on a different board the
> userspace may drive those signals to control LEDs :)
Exactly !!
And that was my point. Thanks for echo.


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