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    SubjectRe: [PATCH 1/2] pci: Add IORESOURCE_BIT entry for PCIe ECAM resources.
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    On Tue, 03 Jun 2014 11:21:10 +0200, Arnd Bergmann <arnd@arndb.de> wrote:
    > On Tuesday 03 June 2014 09:44:59 Grant Likely wrote:
    > > > The reason I think allow an ECAM makes sense in ranges is because it allows for a direct IO read/write to CFG space (w/o any mapping) similar to what one would do for MEM space or IO.
    > >
    > > I don't think that's right. PCI addresses are defined as follows:
    > > phys.hi cell: npt000ss bbbbbbbb dddddfff rrrrrrrr
    > > phys.mid cell: hhhhhhhh hhhhhhhh hhhhhhhh hhhhhhhh
    > > phys.low cell: llllllll llllllll llllllll llllllll
    > >
    > > where 'ddddd' is the device number (0-31) and 'fff' is the function number (0-7)
    > >
    > > Going up by one device number or even function number does not result in
    > > contiguious address values:
    > >
    > > device 0: 0x00000000 00000000 00000000
    > > device 1: 0x00000800 00000000 00000000
    > > device 2: 0x00001000 00000000 00000000
    > > device 3: 0x00001800 00000000 00000000
    > > ...
    > > device 30:0x0000f000 00000000 00000000
    > > device 31:0x0000f800 00000000 00000000
    > >
    > > a simple ranges doesn't work transparently because each of those config
    > > ranges needs to be mapped to a 4k block. I think ranges would need to
    > > look like this:
    > >
    > > ranges = <0x00000000 0 0 0x0ff00000 0x1000>,
    > > <0x00000800 0 0 0x0ff01000 0x1000>,
    > > <0x00001800 0 0 0x0ff02000 0x1000>,
    > > ...
    > > <0x0000f000 0 0 0x0ff1e000 0x1000>,
    > > <0x0000f800 0 0 0x0ff1f000 0x1000>;
    > >
    > > (I just hacked the above up; I make no claims to it's accuracy for
    > > actual address values)
    > >
    > > But I don't even thing the semantics work there because the address is
    > > encoded in the phys.hi cell, not the phys.low cell. Incrementing by one
    > > does not behaves as most bus addresses work. To actually work properly
    > > we would have needed a way to define a stride of 64bits when
    > > incrementing config space addresses in a ranges mapping.
    >
    > Thanks for clearing that up. I always suspected it was roughly this
    > way, but never managed to think it through completely before getting
    > distracted by something else.
    >
    > I wonder if the OF definition matches CAM though, if not ECAM, as
    > CAM is also limited to 256 byte config space per function.

    It's the same problem for 256 byte entries. The address values don't
    increment nicely and there is a big block of remapping needed.

    g.



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