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SubjectRe: [PATCH v2 1/2] ARM: at91/dt: describe rgmii ethernet phy connected to sama5d3xek boards
Hi Florian,

On 26/06/2014 20:15, Florian Fainelli wrote:
> Hi Boris,
> 2014-06-26 3:13 GMT-07:00 Boris BREZILLON <>:
>> Add ethernet-phy node and specify phy interrupt (connected to pin PB25).
>> The PHY address is not specified here because atmel have 2 different
>> designs
>> for its CPU modules: one is connecting PHYAD[0-2] pins to pull up resistors
>> (Embest design) and the other one is connection PHYAD0 to a pull up
>> resistor and PHYAD[1-2] to pull down resistors (Ronetix design).
>> As a result, Ronetix design will have its PHY available at address 0x1 and
>> Embest design at 0x7.
>> Let the net PHY core automatically detect the PHY address by scanning the
>> MDIO bus.
> I though the compatible string was listed as a required property, but
> it is not. The 'reg' property however is listed as required, although
> the of_miodbus_register() works just fine without it, although that is
> a Linux-specific implementation detail.

Indeed, it's listed in the required property list of the DT binding doc,
but the code implement auto detection if reg is missing.
However this line [1] clearly shows that specifying the reg property is
the preferred way of doing things.

I could define 2 different sama5d3xcm.dtsi (sama5d3xcm-ronetix.dtsi and
sama5d3xcm-embest.dtsi) to avoid this dirty hack,
but then we would have 2 more dtb and the user would have to determine
which CPU module he owns to choose the appropriate dtb.
If at91, arm-soc and DT maintainers agree with this approach I can
definitely propose something.

>> Define board specific delays to apply to RGMII signals.
>> Signed-off-by: Boris BREZILLON <>
> Reviewed-by: Florian Fainelli <>

Thanks for your review.

Best Regards,



Boris Brezillon, Free Electrons
Embedded Linux and Kernel engineering

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