Messages in this thread | | | Date | Thu, 19 Jun 2014 22:45:23 +0200 | Subject | Re: [PATCH 1/2] perf/x86: update Haswell PEBS event constraints | From | Stephane Eranian <> |
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On Thu, Jun 19, 2014 at 10:40 PM, Andi Kleen <ak@linux.intel.com> wrote: > On Thu, Jun 19, 2014 at 10:31:29PM +0200, Stephane Eranian wrote: >> On Thu, Jun 19, 2014 at 10:18 PM, Andi Kleen <ak@linux.intel.com> wrote: >> >> I don't quite understand that. >> >> You need to know which events support PEBS. You need a table >> > >> > We're talking about the kernel allowing things here. >> > Yes the user still needs to know what supports PEBS, but >> > that doesn't concern the kernel. >> > >> Just need to make sure you don't return bogus information. > > GIGO. We only need to prevent security issues. > >> > You can just allow it for all, it's a nop if the event doesn't >> > support it. And also the fields like DataLA are simply 0 when >> > not supported. >> > >> >> Let's take a example. If I do resource_stalls:pp, the kernel >> will let it go through and clear the PMI bit on the config as >> is required for PEBS mode. The counter will count normally >> and never fire an interrupt, even when it overflows. It would >> never execute the PMI handler and thus never look at the >> PEBS content. You'd never get any samples. > > Yes if the user specifies a bogus raw event it will not count. > That's fine. The important part is just that nothing ever crashes. > That would certainly avoid the problem of missing events in pebs table. I had a problem with that just today. It also speed up scheduling as well by avoid the table lookups.
Note that I will soon post a patch to speed up scheduling for all x86 processors.
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