Messages in this thread | | | Date | Wed, 28 May 2014 12:39:12 +0200 | From | Sebastian Andrzej Siewior <> | Subject | Re: [Patch V3 19/37] x86, irq: introduce mechanisms to support dynamically allocate IRQ for IOAPIC |
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On 05/28/2014 12:07 PM, Thomas Gleixner wrote: > > Right, so it needs the setup of irq 0 and that only happens when the > legacy_pic->nr_legacy_irqs > 0. > > Do you remember, why we switch to the null_pic later on?
According to my memory all interrupts are serviced by the IOAPIC. The first 16 by the first IOAPIC, 17+ (everything behind the "PCI-bus") by the second IOAPIC. For that reason I didn't see a reason for the legacy PIC and set it to null_pic. Due to the timer problem it is delayed.
> Thanks, > > tglx
Sebastian
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