Messages in this thread | | | Date | Fri, 23 May 2014 11:03:38 +0200 | Subject | Re: [PATCH v2 06/14] mmc: mmci: Qcomm: Add 3 clock cycle delay after register write | From | Linus Walleij <> |
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On Thu, May 15, 2014 at 11:37 AM, <srinivas.kandagatla@linaro.org> wrote:
> From: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> > > Most of the Qcomm SD card controller registers must be updated to the MCLK > domain so subsequent writes to registers will be ignored until 3 clock cycles > have passed. > > This patch adds a 3 clock cycle delay required after writing to controller > registers on Qualcomm SOCs. Without this delay all the register writes are not > successful, resulting in not detecting cards. The write clock delay is > activated by setting up mclk_delayed_writes variable in variant data. > > Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
OK this is looking good. Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Yours, Linus Walleij
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