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SubjectRe: [PATCH] Add support for flag status register on Micron chips.
Date
On Tuesday, April 08, 2014 at 06:12:50 PM, grmoore@altera.com wrote:
> From: Graham Moore <grmoore@altera.com>
>
> Some new Micron flash chips require reading the flag
> status register to determine when operations have completed.
>
> Furthermore, chips with multi-die stacks of the 65nm 256Mb QSPI also
> require reading the status register before reading the flag status
> register.
>
> This patch adds support for the flag status register in the n25q512a1 and
> n25q00 Micron QSPI flash chips.

[...]

> +static int read_fsr(struct m25p *flash)
> +{
> + ssize_t retval;
> + u8 code = OPCODE_RDFSR;
> + u8 val;
> +
> + retval = spi_write_then_read(flash->spi, &code, 1, &val, 1);
> +
> + if (retval < 0) {
> + dev_err(&flash->spi->dev, "error %d reading FSR\n",
> + (int) retval);

Is the type-cast really needed here? Why ?

> + return retval;
> + }
> +
> + return val;
> +}
> +/*
> * Read configuration register, returning its value in the
> * location. Return the configuration register value.
> * Returns negative if error occured.
> @@ -233,7 +259,7 @@ static inline int set_4byte(struct m25p *flash, u32
> jedec_id, int enable) * Service routine to read status register until
> ready, or timeout occurs. * Returns non-zero if error.
> */
> -static int wait_till_ready(struct m25p *flash)
> +static int _wait_till_ready(struct m25p *flash)

Please avoid using function names that start with underscore .
[...]

Thanks!

Best regards,
Marek Vasut


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