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SubjectRe: [PATCH] Add support for flag status register on Micron chips.
Date
On Wednesday, April 09, 2014 7:16 PM, Jingoo Han wrote:
> On Wednesday, April 09, 2014 7:07 PM, Marek Vasut wrote:
> > On Tuesday, April 08, 2014 at 06:12:50 PM, grmoore@altera.com wrote:
> > > From: Graham Moore <grmoore@altera.com>
> > >
> > > Some new Micron flash chips require reading the flag
> > > status register to determine when operations have completed.
> > >
> > > Furthermore, chips with multi-die stacks of the 65nm 256Mb QSPI also
> > > require reading the status register before reading the flag status
> > > register.
> > >
> > > This patch adds support for the flag status register in the n25q512a1 and
> > > n25q00 Micron QSPI flash chips.
> >
> > [...]
> >
> > > +static int read_fsr(struct m25p *flash)
> > > +{
> > > + ssize_t retval;
> > > + u8 code = OPCODE_RDFSR;
> > > + u8 val;
> > > +
> > > + retval = spi_write_then_read(flash->spi, &code, 1, &val, 1);
> > > +
> > > + if (retval < 0) {
> > > + dev_err(&flash->spi->dev, "error %d reading FSR\n",
> > > + (int) retval);
> >
> > Is the type-cast really needed here? Why ?
>
> The type-cast looks clumsy.
> The type of 'retval' is retval; thus, '%zd' can be used,

Sorry, there is a typo!
s/retval/ssize_t

The type of 'retval' is "ssize_t"; thus, '%zd' can be used,
instead of '%d', as below.

+ dev_err(&flash->spi->dev, "error %zd reading FSR\n",
+ retval);

Best regards,
Jingoo Han



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