Messages in this thread | | | From | Andi Kleen <> | Subject | Add support for RD/WR FS/GSBASE | Date | Mon, 28 Apr 2014 15:12:34 -0700 |
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This adds kernel support for some Intel instructions that allow fast access to the FS and GS 64bit base. They need some changes to entry_64.S because they allow user to fully control the GS base.
Advantages: - NMIs (and other "paranoid" interrupts) avoid one RDMSR which makes them faster - User space can use these instructions, mainly for efficient context switching with user thread libraries - Context switches do not need to use MSR writes anymore to context switch FS/GS base >4GB. This will speed up applications that have enough thread local data that it won't fit below 4GB. - User space can use GS efficiently as an additional global pointer register
I also included one minor (unrelated) optimization to disable an unneeded old SWAPGS workaround.
-Andi
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