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SubjectRe: [PATCH] pinctrl-baytrail: workaround for irq descriptor conflict on ASUS T100TA
On Wed, 23 Apr 2014, Linus Walleij wrote:
> However this is a first time for an embedded irqchip (coupled
> with GPIO ACPI) creeping into the x86 world, so it needs some
> attention I think, do we have a direction forward for peaceful
> coexistence of several irq controllers picking some IRQ
> numbers/descriptors dynamically as they probe, also on
> x86 systems?

The issue on x86 is, that we have basically two classes of interrupts.

- The hardwired ones (in the chipset and we have no way to
change that except with MSI)

- The dynamic ones, i.e. MSI[X]

So for allocating the MSI interrupts we use the range above the
possible hardwired interrupts.

Unfortunaly the information where the reserved/hardwired range ends is
not available to drivers, but it should be simple to do so.

I'm traveling until friday, so please wait before you commit that
fugly hack. I'll have a closer look how we can handle that at the core
level.

Thanks,

tglx




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