Messages in this thread | | | Date | Tue, 22 Apr 2014 12:54:43 -0400 | From | Rik van Riel <> | Subject | Re: [PATCH 2/6] x86: mm: rip out complicated, out-of-date, buggy TLB flushing |
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On 04/21/2014 02:24 PM, Dave Hansen wrote: > From: Dave Hansen <dave.hansen@linux.intel.com> > > I think the flush_tlb_mm_range() code that tries to tune the > flush sizes based on the CPU needs to get ripped out for > several reasons: > > 1. It is obviously buggy. It uses mm->total_vm to judge the > task's footprint in the TLB. It should certainly be using > some measure of RSS, *NOT* ->total_vm since only resident > memory can populate the TLB. > 2. Haswell, and several other CPUs are missing from the > intel_tlb_flushall_shift_set() function. Thus, it has been > demonstrated to bitrot quickly in practice. > 3. It is plain wrong in my vm: > [ 0.037444] Last level iTLB entries: 4KB 0, 2MB 0, 4MB 0 > [ 0.037444] Last level dTLB entries: 4KB 0, 2MB 0, 4MB 0 > [ 0.037444] tlb_flushall_shift: 6 > Which leads to it to never use invlpg. > 4. The assumptions about TLB refill costs are wrong: > http://lkml.kernel.org/r/1337782555-8088-3-git-send-email-alex.shi@intel.com > (more on this in later patches) > 5. I can not reproduce the original data: https://lkml.org/lkml/2012/5/17/59 > I believe the sample times were too short. Running the > benchmark in a loop yields times that vary quite a bit. > > Note that this leaves us with a static ceiling of 1 page. This > is a conservative, dumb setting, and will be revised in a later > patch. > > Signed-off-by: Dave Hansen <dave.hansen@linux.intel.com>
Acked-by: Rik van Riel <riel@redhat.com>
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