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SubjectRe: [patch] x86: Introduce BOOT_EFI and BOOT_CF9 into the reboot sequence loop
On Fri, Feb 28, 2014 at 02:07:58PM +0800, Li, Aubrey wrote:
> On 2014/2/28 13:56, Matthew Garrett wrote:
> > Probably, once we've got those patches landed (I've lost track of
> > whether they're in 3.13 or aimed at 3.14)
>
> You didn't look the reference I quoted in the patch.
>
> It's stable if 32/64 bit linux call the corresponding 32/64bit EFI
> runtime service. Matt Fleming's mixed mode is aiming at 3.15:
>
> http://git.kernel.org/cgit/linux/kernel/git/mfleming/efi.git/log/?h=mixed-mode

It's stable as long as you have the 1:1 mapping patches, which are
different to the mixed mode patches. Otherwise it'll work on some
hardware and crash on others.

> > Mm. Not all x86 platforms support cf8/cf9 (Moorestown, for instance) and
> > so it's theoretically possible that they'd put some different hardware
> > there instead. But then, Moorestown probably has its own reboot code, so
> > that may not matter?
>
> Yes, Moorestown has its own machine_ops. Instead of the system hanging
> after issue "reboot" command, I think and suggest CF9 is worth to have a
> try.

Writing to arbitrary register addresses isn't a good plan if we're on a
platform that might have different hardware there.

> >> Reset register address: 0xCF9
> >> Value to cause reset: 0x6
> >
> > Huh. But that's almost exactly what the PCI reboot code would do. Why
> > does the PCI method work but the ACPI one fail? Does it really depend on
> > ORing the original value with the reset value? Or is the timing just
> > somehow marginal?
>
> reboot returns at:
>
> if (!(acpi_gbl_FADT.flags & ACPI_FADT_RESET_REGISTER))
> return;
>
> This is a ACPI bug or intention, who knows.

Well, how about we figure that out? Is there a full acpi dump of one of
these machines somewhere?

--
Matthew Garrett | mjg59@srcf.ucam.org


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