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SubjectRe: [PATCH v3 1/2] regulator: anatop: Add power gating support to digital LDOs
On Tue, Feb 11, 2014 at 02:43:44PM +0100, Philipp Zabel wrote:
> The ARM, PU, and SOC LDOs in the i.MX6 PMU can completely gate
> their power output. Since power gating is configured by writing
> zero to the voltage target bitfield,, store a copy of the
> voltage selector to be restored when reenabling the regulator.

Applied both, thanks.
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