Messages in this thread | | | Date | Fri, 7 Nov 2014 10:30:45 -0800 | From | Scott Branden <> | Subject | Re: [PATCHv2 5/5] mmc: sdhci-bcm2835: add sdhci quirk SDHCI_QUIRK_MULTIBLOCK_READ_ACMD12 |
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On 14-11-05 08:50 PM, Stephen Warren wrote: > On 11/05/2014 12:02 AM, Scott Branden wrote: >> On 14-11-04 09:00 PM, Stephen Warren wrote: >>> On 10/30/2014 12:36 AM, Scott Branden wrote: >>>> SDHCI_QUIRK_MULTIBLOCK_READ_ACMD12 is missing and needed for this >>>> controller. >>> >>> This seems fine, although any explanation of why this quirk is needed >>> would be useful. >>> >> I don't know who to talk to at Arasan about this. Will try hunting >> around a little for more info as to why this is needed to have eMMC and >> SD work properly through our internal testing on other non-2835 chipset >> that shares the same SDHCI controller as 2835. > > I thought I heard that this wasn't a bug in the controller itself, but > rather an integration issue between the IP core and the register bus > it's attached to. Consequently, it may be SoC-specific or at least have > SoC-specific variations? Yes, this patch is to fix a different bug (in the IP) rather than the clock domain integration issue. >
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