Messages in this thread | | | Date | Mon, 3 Nov 2014 20:01:26 +0100 (CET) | From | Thomas Gleixner <> | Subject | Re: [PATCH v4 5/7] x86, mm, pat: Refactor !pat_enabled handling |
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On Mon, 27 Oct 2014, Toshi Kani wrote: > diff --git a/arch/x86/mm/iomap_32.c b/arch/x86/mm/iomap_32.c > index ee58a0b..96aa8bf 100644 > --- a/arch/x86/mm/iomap_32.c > +++ b/arch/x86/mm/iomap_32.c > @@ -70,29 +70,23 @@ void *kmap_atomic_prot_pfn(unsigned long pfn, pgprot_t prot) > return (void *)vaddr; > } > > -/* > - * Map 'pfn' using protections 'prot' > - */ > -#define __PAGE_KERNEL_WC (__PAGE_KERNEL | \ > - cachemode2protval(_PAGE_CACHE_MODE_WC)) > - > void __iomem * > iomap_atomic_prot_pfn(unsigned long pfn, pgprot_t prot) > { > /* > - * For non-PAT systems, promote PAGE_KERNEL_WC to PAGE_KERNEL_UC_MINUS. > - * PAGE_KERNEL_WC maps to PWT, which translates to uncached if the > - * MTRR is UC or WC. UC_MINUS gets the real intention, of the > - * user, which is "WC if the MTRR is WC, UC if you can't do that." > + * For non-PAT systems, translate non-WB request to UC- just in > + * case the caller set the PWT bit to prot directly without using > + * pgprot_writecombine(). UC- translates to uncached if the MTRR > + * is UC or WC. UC- gets the real intention, of the user, which is > + * "WC if the MTRR is WC, UC if you can't do that." > */ > - if (!pat_enabled && pgprot_val(prot) == __PAGE_KERNEL_WC) > + if (!pat_enabled && pgprot2cachemode(prot) != _PAGE_CACHE_MODE_WB) > prot = __pgprot(__PAGE_KERNEL | > cachemode2protval(_PAGE_CACHE_MODE_UC_MINUS)); > > return (void __force __iomem *) kmap_atomic_prot_pfn(pfn, prot); > } > EXPORT_SYMBOL_GPL(iomap_atomic_prot_pfn); > -#undef __PAGE_KERNEL_WC
Rejects. Please update against Juergens latest.
Thanks,
tglx
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