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Subject[RFC 0/2] Fix Arndale Octa/Peach Pi boot on Audio subsystem clocks
Date
Hi,


This is initial idea to solve dependency between AudioSS clocks
and main clock controller on Exynos platform.

This solves boot failure of Peach Pi/Pit and Arndale Octa [1].

It is only RFC/proof of concept because I would like to hear whether
this is good direction to solve this particular issue (especially that
it touches main clk api).


[1] http://www.spinics.net/lists/linux-samsung-soc/msg39331.html

Best regards,
Krzysztof Kozlowski


Krzysztof Kozlowski (2):
clk: Allow overriding generic ops for clocks
clk: samsung: Fix clock disable failure because domain being gated

drivers/clk/clk-gate.c | 16 ++++++--
drivers/clk/samsung/clk-exynos-audss.c | 69 +++++++++++++++++++++++++++-------
include/linux/clk-provider.h | 5 +++
3 files changed, 74 insertions(+), 16 deletions(-)

--
1.9.1



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