Messages in this thread | | | Date | Wed, 19 Nov 2014 10:51:05 +0100 | From | Daniel Lezcano <> | Subject | Re: [PATCH] clocksource: sirf: remove hard-coded clock rate |
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On 11/11/2014 01:42 PM, Barry Song wrote: > From: Yanchang Li <yl22@csr.com> > > customers might adjust the whole PLL and dividers according to different > user scenerios, and this causes the parent clock of sirf clocksource not > be divided exactly by current hard-coded 1MHz clock rate. > this patch removes the hard-coded rate and make clocksource drivers more > adaptive to external changes. > > Signed-off-by: Yanchang Li <yl22@csr.com> > Signed-off-by: Barry Song <Baohua.Song@csr.com>
Patch queued for 3.19
Thanks !
-- Daniel
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