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    Subject[PATCH 3.17 210/319] usb: dwc3: gadget: Properly initialize LINK TRB
    Date
    3.17-stable review patch.  If anyone has any objections, please let me know.

    ------------------

    From: Jack Pham <jackp@codeaurora.org>

    commit 1200a82a59b6aa65758ccc92c3447b98c53cd7a2 upstream.

    On ISOC endpoints the last trb_pool entry used as a
    LINK TRB is not getting zeroed out correctly due to
    memset being called incorrectly and in the wrong place.
    If pool allocated from DMA was not zero-initialized
    to begin with this will result in the size and ctrl
    values being random garbage. Call memset correctly after
    assignment of the trb_link pointer.

    Fixes: f6bafc6a1c ("usb: dwc3: convert TRBs into bitshifts")
    Signed-off-by: Jack Pham <jackp@codeaurora.org>
    Signed-off-by: Felipe Balbi <balbi@ti.com>
    Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

    ---
    drivers/usb/dwc3/gadget.c | 3 +--
    1 file changed, 1 insertion(+), 2 deletions(-)

    --- a/drivers/usb/dwc3/gadget.c
    +++ b/drivers/usb/dwc3/gadget.c
    @@ -615,12 +615,11 @@ static int __dwc3_gadget_ep_enable(struc
    if (!usb_endpoint_xfer_isoc(desc))
    return 0;

    - memset(&trb_link, 0, sizeof(trb_link));
    -
    /* Link TRB for ISOC. The HWO bit is never reset */
    trb_st_hw = &dep->trb_pool[0];

    trb_link = &dep->trb_pool[DWC3_TRB_NUM - 1];
    + memset(trb_link, 0, sizeof(*trb_link));

    trb_link->bpl = lower_32_bits(dwc3_trb_dma_offset(dep, trb_st_hw));
    trb_link->bph = upper_32_bits(dwc3_trb_dma_offset(dep, trb_st_hw));



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