| Date | Sat, 1 Nov 2014 20:56:20 +0100 (CET) | From | Thomas Gleixner <> | Subject | Re: [PATCH v2 3/8] x86: Store a per-cpu shadow copy of CR4 |
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On Fri, 24 Oct 2014, Andy Lutomirski wrote:
> Context switches and TLB flushes can change individual bits of CR4. > CR4 reads take several cycles, so store a shadow copy of CR4 in a > per-cpu variable. > > To avoid wasting a cache line, I added the CR4 shadow to > cpu_tlbstate, which is already touched in switch_mm. The heaviest > users of the cr4 shadow will be switch_mm and __switch_to_xtra, and > __switch_to_xtra is called shortly after switch_mm during context > switch, so the cacheline is likely to be hot. > > Signed-off-by: Andy Lutomirski <luto@amacapital.net>
Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
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