Messages in this thread | | | Date | Tue, 7 Oct 2014 09:43:39 +0100 | From | James Hogan <> | Subject | Re: [PATCH] MIPS: Allow FPU emulator to use non-stack area. |
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Hi David,
On 06/10/14 21:11, David Daney wrote: > Any userspace thread desiring a non-executable stack, > must allocate a 4-byte aligned area at least 8 bytes long
<snip>
> +SYSCALL_DEFINE1(set_fpuemul_xol_area, unsigned long, addr) > +{ > + struct thread_info *ti = task_thread_info(current); > + > + ti->fpu_emul_xol = addr; > + return 0; > +} > +
<snip>
> - /* Ensure that the two instructions are in the same cache line */ > - fr = (struct emuframe __user *) > - ((regs->regs[29] - sizeof(struct emuframe)) & ~0x7); > + if (ti->fpu_emul_xol != ~0ul) > + fr = (struct emuframe *)ti->fpu_emul_xol; > + else > + /* Ensure that the two instructions are in the same cache line */ > + fr = (struct emuframe __user *) > + ((regs->regs[29] - sizeof(struct emuframe)) & ~0x7);
I know your patch was more an RFC, but on a technical note, this comment/code seems to imply that the address should be 8 byte aligned (rather than 4 byte) so they both land in the same cache line. Also, I think the alignment should be validated in the syscall.
Cheers James
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