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    Subject[PATCH RFC v2 8/8] ARM: zynq: DT: Add pinctrl information
    Date
    Add pinctrl descriptions to the zc702 and zc706 device trees.

    Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
    ---
    arch/arm/boot/dts/zynq-7000.dtsi | 8 ++-
    arch/arm/boot/dts/zynq-zc702.dts | 147 +++++++++++++++++++++++++++++++++++++++
    arch/arm/boot/dts/zynq-zc706.dts | 126 +++++++++++++++++++++++++++++++++
    3 files changed, 280 insertions(+), 1 deletion(-)

    diff --git a/arch/arm/boot/dts/zynq-7000.dtsi b/arch/arm/boot/dts/zynq-7000.dtsi
    index 24036c440440..37d7fe36a129 100644
    --- a/arch/arm/boot/dts/zynq-7000.dtsi
    +++ b/arch/arm/boot/dts/zynq-7000.dtsi
    @@ -238,7 +238,7 @@
    slcr: slcr@f8000000 {
    #address-cells = <1>;
    #size-cells = <1>;
    - compatible = "xlnx,zynq-slcr", "syscon";
    + compatible = "xlnx,zynq-slcr", "syscon", "simple-bus";
    reg = <0xF8000000 0x1000>;
    ranges;
    clkc: clkc@100 {
    @@ -259,6 +259,12 @@
    "dbg_trc", "dbg_apb";
    reg = <0x100 0x100>;
    };
    +
    + pinctrl0: pinctrl@700 {
    + compatible = "xlnx,pinctrl-zynq";
    + reg = <0x700 0x200>;
    + syscon = <&slcr>;
    + };
    };

    dmac_s: dmac@f8003000 {
    diff --git a/arch/arm/boot/dts/zynq-zc702.dts b/arch/arm/boot/dts/zynq-zc702.dts
    index 94e2cda6f9b6..b3ec4d26a9b3 100644
    --- a/arch/arm/boot/dts/zynq-zc702.dts
    +++ b/arch/arm/boot/dts/zynq-zc702.dts
    @@ -40,21 +40,32 @@

    &can0 {
    status = "okay";
    + pinctrl-names = "default";
    + pinctrl-0 = <&pinctrl_can0_default>;
    };

    &gem0 {
    status = "okay";
    phy-mode = "rgmii-id";
    phy-handle = <&ethernet_phy>;
    + pinctrl-names = "default";
    + pinctrl-0 = <&pinctrl_gem0_default>;

    ethernet_phy: ethernet-phy@7 {
    reg = <7>;
    };
    };

    +&gpio0 {
    + pinctrl-names = "default";
    + pinctrl-0 = <&pinctrl_gpio0_default>;
    +};
    +
    &i2c0 {
    status = "okay";
    clock-frequency = <400000>;
    + pinctrl-names = "default";
    + pinctrl-0 = <&pinctrl_i2c0_default>;

    i2cswitch@74 {
    compatible = "nxp,pca9548";
    @@ -128,10 +139,146 @@
    };
    };

    +&pinctrl0 {
    + pinctrl_can0_default: pinctrl-can0-default {
    + common {
    + function = "can0";
    + groups = "can0_9_grp";
    + bias-pull-up = <0>;
    + slew-rate = <0>;
    + io-standard = <1>;
    + };
    +
    + rx {
    + pins = "MIO46";
    + bias-high-impedance = <1>;
    + };
    +
    + tx {
    + pins = "MIO47";
    + bias-high-impedance = <0>;
    + };
    + };
    +
    + pinctrl_gem0_default: pinctrl-gem0-default {
    + common {
    + function = "ethernet0";
    + groups = "ethernet0_0_grp";
    + bias-pull-up = <0>;
    + slew-rate = <0>;
    + io-standard = <4>;
    + };
    +
    + rx {
    + pins = "MIO22", "MIO23", "MIO24", "MIO25", "MIO26", "MIO27";
    + bias-high-impedance = <1>;
    + low-power-disable;
    + };
    +
    + tx {
    + pins = "MIO16", "MIO17", "MIO18", "MIO19", "MIO20", "MIO21";
    + bias-high-impedance = <0>;
    + low-power-enable;
    + };
    +
    + mdio {
    + function = "mdio0";
    + groups = "mdio0_0_grp";
    + };
    + };
    +
    + pinctrl_gpio0_default: pinctrl-gpio0-default {
    + common {
    + function = "gpio0";
    + groups = "gpio0_7_grp", "gpio0_8_grp", "gpio0_9_grp",
    + "gpio0_10_grp", "gpio0_11_grp", "gpio0_12_grp",
    + "gpio0_13_grp", "gpio0_14_grp";
    + bias-high-impedance = <0>;
    + slew-rate = <0>;
    + io-standard = <1>;
    + };
    +
    + pull-up {
    + pins = "MIO9", "MIO10", "MIO11", "MIO12", "MIO13", "MIO14";
    + bias-pull-up = <1>;
    + };
    +
    + pull-none {
    + pins = "MIO7", "MIO8";
    + bias-pull-up = <0>;
    + };
    +
    + };
    +
    + pinctrl_i2c0_default: pinctrl-i2c0-default {
    + common {
    + groups = "i2c0_10_grp";
    + function = "i2c0";
    + bias-pull-up = <1>;
    + bias-high-impedance = <0>;
    + slew-rate = <0>;
    + io-standard = <1>;
    + };
    + };
    +
    + pinctrl_sdhci0_default: pinctrl-sdhci0-default {
    + common {
    + groups = "sdio0_2_grp";
    + function = "sdio0";
    + bias-high-impedance = <0>;
    + bias-pull-up = <0>;
    + slew-rate = <0>;
    + io-standard = <1>;
    + };
    +
    + cd {
    + groups = "gpio0_0_grp";
    + function = "sdio0_cd";
    + bias-high-impedance = <1>;
    + bias-pull-up = <1>;
    + slew-rate = <0>;
    + io-standard = <1>;
    + };
    +
    + wp {
    + groups = "gpio0_15_grp";
    + function = "sdio0_wp";
    + bias-high-impedance = <1>;
    + bias-pull-up = <1>;
    + slew-rate = <0>;
    + io-standard = <1>;
    + };
    + };
    +
    + pinctrl_uart1_default: pinctrl-uart1-default {
    + common {
    + groups = "uart1_10_grp";
    + function = "uart1";
    + bias-pull-up = <0>;
    + slew-rate = <0>;
    + io-standard = <1>;
    + };
    +
    + rx {
    + pins = "MIO49";
    + bias-high-impedance = <1>;
    + };
    +
    + tx {
    + pins = "MIO48";
    + bias-high-impedance = <0>;
    + };
    + };
    +};
    +
    &sdhci0 {
    status = "okay";
    + pinctrl-names = "default";
    + pinctrl-0 = <&pinctrl_sdhci0_default>;
    };

    &uart1 {
    status = "okay";
    + pinctrl-names = "default";
    + pinctrl-0 = <&pinctrl_uart1_default>;
    };
    diff --git a/arch/arm/boot/dts/zynq-zc706.dts b/arch/arm/boot/dts/zynq-zc706.dts
    index a8bbdfbc7093..42a335431613 100644
    --- a/arch/arm/boot/dts/zynq-zc706.dts
    +++ b/arch/arm/boot/dts/zynq-zc706.dts
    @@ -33,15 +33,24 @@
    status = "okay";
    phy-mode = "rgmii-id";
    phy-handle = <&ethernet_phy>;
    + pinctrl-names = "default";
    + pinctrl-0 = <&pinctrl_gem0_default>;

    ethernet_phy: ethernet-phy@7 {
    reg = <7>;
    };
    };

    +&gpio0 {
    + pinctrl-names = "default";
    + pinctrl-0 = <&pinctrl_gpio0_default>;
    +};
    +
    &i2c0 {
    status = "okay";
    clock-frequency = <400000>;
    + pinctrl-names = "default";
    + pinctrl-0 = <&pinctrl_i2c0_default>;

    i2cswitch@74 {
    compatible = "nxp,pca9548";
    @@ -107,10 +116,127 @@
    };
    };

    +&pinctrl0 {
    + pinctrl_gem0_default: pinctrl-gem0-default {
    + common {
    + function = "ethernet0";
    + groups = "ethernet0_0_grp";
    + bias-pull-up = <0>;
    + slew-rate = <0>;
    + io-standard = <4>;
    + };
    +
    + rx {
    + pins = "MIO22", "MIO23", "MIO24", "MIO25", "MIO26", "MIO27";
    + bias-high-impedance = <1>;
    + low-power-disable;
    + };
    +
    + tx {
    + pins = "MIO16", "MIO17", "MIO18", "MIO19", "MIO20", "MIO21";
    + bias-high-impedance = <0>;
    + low-power-enable;
    + };
    +
    + mdio {
    + function = "mdio0";
    + groups = "mdio0_0_grp";
    + bias-high-impedance = <0>;
    + bias-pull-up = <0>;
    + slew-rate = <0>;
    + io-standard = <1>;
    + };
    + };
    +
    + pinctrl_gpio0_default: pinctrl-gpio0-default {
    + common {
    + function = "gpio0";
    + groups = "gpio0_7_grp", "gpio0_46_grp", "gpio0_47_grp";
    + bias-high-impedance = <0>;
    + slew-rate = <0>;
    + io-standard = <1>;
    + };
    +
    + pull-up {
    + pins = "MIO46", "MIO47";
    + bias-pull-up = <1>;
    + };
    +
    + pull-none {
    + pins = "MIO7";
    + bias-pull-up = <0>;
    + };
    + };
    +
    + pinctrl_i2c0_default: pinctrl-i2c0-default {
    + common {
    + groups = "i2c0_10_grp";
    + function = "i2c0";
    + bias-high-impedance = <0>;
    + bias-pull-up = <1>;
    + slew-rate = <0>;
    + io-standard = <1>;
    + };
    + };
    +
    + pinctrl_sdhci0_default: pinctrl-sdhci0-default {
    + common {
    + groups = "sdio0_2_grp";
    + function = "sdio0";
    + bias-high-impedance = <0>;
    + bias-pull-up = <0>;
    + slew-rate = <0>;
    + io-standard = <1>;
    + };
    +
    + cd {
    + groups = "gpio0_14_grp";
    + function = "sdio0_cd";
    + bias-high-impedance = <1>;
    + bias-pull-up = <1>;
    + slew-rate = <0>;
    + io-standard = <1>;
    + };
    +
    + wp {
    + groups = "gpio0_15_grp";
    + function = "sdio0_wp";
    + bias-high-impedance = <1>;
    + bias-pull-up = <1>;
    + slew-rate = <0>;
    + io-standard = <1>;
    + };
    + };
    +
    + pinctrl_uart1_default: pinctrl-uart1-default {
    + common {
    + groups = "uart1_10_grp";
    + function = "uart1";
    + bias-pull-up = <0>;
    + slew-rate = <0>;
    + io-standard = <1>;
    + };
    +
    + rx {
    + pins = "MIO49";
    + bias-high-impedance = <1>;
    + };
    +
    + tx {
    + pins = "MIO48";
    + bias-high-impedance = <0>;
    + };
    + };
    +};
    +
    &sdhci0 {
    status = "okay";
    + pinctrl-names = "default";
    + pinctrl-0 = <&pinctrl_sdhci0_default>;
    };

    &uart1 {
    status = "okay";
    + pinctrl-names = "default";
    + pinctrl-0 = <&pinctrl_uart1_default>;
    };
    --
    2.1.2.1.g5e69ed6


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