Messages in this thread | | | Date | Wed, 25 Sep 2013 16:43:33 +0200 | From | Michal Simek <> | Subject | Re: [RFC PATCH] fpga: Introduce new fpga subsystem |
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On 09/25/2013 04:27 PM, Philip Balister wrote: > On 09/25/2013 08:00 AM, Pavel Machek wrote: >> Hi! >> >>>>> The firmware approach is interesting. It might be less flexible >>>>> compared with my original code (see link to git below) that this is >>>> >>>> On the other hand... that's the interface world wants, right? To most >>>> users, fpga bitstream is just a firmware. >>>> >>> >>> No, not really. >>> >>> The typical assumption with the firmware interface is that there is >>> exactly one possible firmware for each device (possibly modulated by >>> driver version, but still.) >> >> Actually, I have seen counterexample there, too. Wifi card had >> different firmware for host and access points mode, probably because >> internal RAM could not fit both at same time. > > And another counter example ... > > For the Zynq based product I am working on, we encourage the end user to > create their own bitstreams to customize their application. So we need > an easy way for the user to load a bitstream. cat foo.bin > /dev/xdevcfg > works well for us.
You probably don't care if this will be cat foo.bin > /sys/fpga/fpga0/<whatever> (for zynq case you can also run) cat foo.bit > /sys/fpga/fpga0/<whatever>
FYI: Current driver in xilinx repo supports bit format too.
> Then we need to make sure that the interface supports partial > reconfiguration.
That will be next step.
> That said, having a sane user api that addresses the various fpga use > cases would be a win for use since we would not need to write custom > user space code for every platform created in the future. I'd like to > see this api work with things like PCI based FPGA cards and discrete > fpgas that are not integrated with an arm etc.
I don't have any PCI based FPGA card to have information how to work with it but for discrete fpga I have one application note where jtag is emulated by gpio interface and you can program another fpga from zynq (This can be probably generic case for any combination in this 4 pin connection).
Thanks, Michal
-- Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91 w: www.monstr.eu p: +42-0-721842854 Maintainer of Linux kernel - Microblaze cpu - http://www.monstr.eu/fdt/ Maintainer of Linux kernel - Xilinx Zynq ARM architecture Microblaze U-BOOT custodian and responsible for u-boot arm zynq platform
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