Messages in this thread | | | Date | Wed, 25 Sep 2013 08:58:55 -0400 | From | Christopher Covington <> | Subject | Re: [PATCH v1 1/7] arm64: introduce basic aarch64 instruction decoding helpers |
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Hi Jiang,
On 09/25/2013 06:44 AM, Jiang Liu wrote:
[...]
> diff --git a/arch/arm64/kernel/insn.c b/arch/arm64/kernel/insn.c
[...]
> +static int aarch64_insn_cls[] = { > + AARCH64_INSN_CLS_UNKNOWN, /* 0 0 X X */ > + AARCH64_INSN_CLS_UNKNOWN, /* 0 0 X X */ > + AARCH64_INSN_CLS_UNKNOWN, /* 0 0 X X */ > + AARCH64_INSN_CLS_UNKNOWN, /* 0 0 X X */ > + AARCH64_INSN_CLS_LDST, /* X 1 X 0 */ > + AARCH64_INSN_CLS_DP_REG, /* X 1 0 1 */ > + AARCH64_INSN_CLS_LDST, /* X 1 X 0 */ > + AARCH64_INSN_CLS_DP_FPSIMD, /* 0 1 1 1 */ > + AARCH64_INSN_CLS_DP_IMM, /* 1 0 0 X */ > + AARCH64_INSN_CLS_DP_IMM, /* 1 0 0 X */ > + AARCH64_INSN_CLS_BR_SYS, /* 1 0 1 X */ > + AARCH64_INSN_CLS_BR_SYS, /* 1 0 1 X */ > + AARCH64_INSN_CLS_LDST, /* X 1 X 0 */ > + AARCH64_INSN_CLS_DP_REG, /* X 1 0 1 */ > + AARCH64_INSN_CLS_LDST, /* X 1 X 0 */ > + AARCH64_INSN_CLS_DP_FPSIMD, /* 1 1 1 1 */ > +};
As I read this, I was initially puzzled as to why there are duplicate entries in the list. Since the data structure doesn't really support don't-cares, perhaps it would be clearer to use 1's and 0's instead of X's.
[...]
Thanks, Christopher
-- Employee of Qualcomm Innovation Center, Inc. Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by the Linux Foundation.
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