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SubjectRe: [PATCH] lockref: use cmpxchg64 explicitly for lockless updates
On Fri, Sep 20, 2013 at 05:00:19PM +0100, Linus Torvalds wrote:
> On Fri, Sep 20, 2013 at 10:45 AM, Will Deacon <will.deacon@arm.com> wrote:
> > If we can guarantee that the CODE just messes around with the lockref, those
> > barriers probably aren't needed...
>
> Yes. I've been thyinking about the barrier issue, and as far as I can
> see, as long as the lockref code only ever messes with the reference
> count, a totally unordered cmpxchg is fine.

The only problem then is the use of cmpxchg64 by the sched_clock code.
Whilst most sched_clock() implementations probably have barrier semantics
due to I/O access, that's certainly not true everywhere so I don't think
the cmpxchg64 there can be relaxed safely.

We could add cmpxchg64_relaxed (at the risk of confusing it with the relaxed
I/O accessors, which aren't well defined)? That might help Tony with ia64
too.

> And at least right now we indeed only ever mess with the reference count.
>
> I have been idly toying with the concept of using the cmpxchg also for
> possibly taking the lock (for the "xyz_or_lock" versions), but every
> time I look at it it seems unlikely to help, and it would require
> memory ordering and various architecture-dependent issues, so I
> suspect it's never going to make much sense. So yes, an unordered
> cmpxchg64 should be perfectly fine.

Yikes, using cmpxchg for the locking sounds scary. For the contended case, I
think spinlocks would be better since they might have back-off and/or
fairness logic which we'd lose if we somehow moved exclusively to cmpxchg.

> > As for AIM7/re-aim, I'm having a hard time getting repeatable numbers out of
> > it to establish a baseline, so it's not proving to be especially helpful.
>
> That's fine, and yeah, I doubt the t.c improvement really shows
> anywhere else (it's kind of extreme), but your numbers are certainly
> already sufficient to say "ok, it makes sense even on 32-bit
> machines".

Great, thanks.

Will


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