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SubjectRe: [PATCH v4 2/3] usb: phy: Add Qualcomm SS-USB and HS-USB drivers for DWC3 core
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Hi,

On Tue, 2013-08-20 at 08:37 -0500, Felipe Balbi wrote:
> Hi,
>
> On Tue, Aug 20, 2013 at 04:32:23PM +0300, Ivan T. Ivanov wrote:
> > > On Tue, Aug 20, 2013 at 12:56:04PM +0300, Ivan T. Ivanov wrote:
> > > > From: "Ivan T. Ivanov" <iivanov@mm-sol.com>
> > > >
> > > > These drivers handles control and configuration of the HS
> > > > and SS USB PHY transceivers. They are part of the driver
> > > > which manage Synopsys DesignWare USB3 controller stack
> > > > inside Qualcomm SoC's.
> > > >
> > > > Signed-off-by: Ivan T. Ivanov <iivanov@mm-sol.com>
> > > > ---
> > > > drivers/usb/phy/Kconfig | 11 ++
> > > > drivers/usb/phy/Makefile | 2 +
> > > > drivers/usb/phy/phy-msm-dwc3-hs.c | 327 ++++++++++++++++++++++++++++++++
> > > > drivers/usb/phy/phy-msm-dwc3-ss.c | 374 +++++++++++++++++++++++++++++++++++++
> > >
> > > please rename these PHY drivers, they have nothing to do with DWC3. PHYs
> > > don't care about the USB controller.
> >
> > I think they are SNPS DesignWare PHY's, additionally
> > wrapped with Qualcomm logic. I could substitute "dwc3"
> > with just "dw", which will be more correct.
>
> alright, thank you. Let's add Paul to the loop since he might have very
> good insight in the synopsys PHYs.
>
> mental note: if any other platform shows up with Synopsys PHY, ask them
> to use this driver instead :-)

I really doubt that this will bi possible. Control of the PHY's is
not directly trough ULPI, UTMI or PIPE3 interfaces, but trough
QSCRATCH registers, which of course is highly Qualcomm specific.

Regards,
Ivan




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