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SubjectRe: [PATCHv3 2/3] ARM: mxs: cfa10049: Switch bus i2c1 to bitbanging
Date
Dear Alexandre Belloni,

> On 02/07/2013 13:50, Alexandre Belloni wrote:
> > On 02/07/2013 13:45, Fabio Estevam wrote:
> >> Shouldn't this be
> >>
> >> i2c@1 {
> >>
> >> reg = <1>; ?
> >
> > No, we have 4 devices on that mux and 2 pins to select the muxing.
>
> OK, got it working.
>
> So, the results:
>
> bitbanging:
>
> # time cat /sys/bus/iio/devices/iio\:device1/in_voltage0_raw
> 2637
> real 0m 0.09s
> user 0m 0.01s
> sys 0m 0.01s
>
>
> i2c-mxs PIO mode:
>
> # time cat /sys/bus/iio/devices/iio\:device1/in_voltage0_raw
> [ 35.007650] [sched_delayed] sched: RT throttling activated
> 2627
> real 0m 7.14s
> user 0m 0.02s
> sys 0m 0.01s
>
>
> i2c-mxs PIO mode without LRADC:
>
> # time cat /sys/bus/iio/devices/iio\:device1/in_voltage0_raw
> [ 18.007432] [sched_delayed] sched: RT throttling activated
> 2629
> real 0m 7.09s
> user 0m 0.00s
> sys 0m 0.03s
>
>
> i2c-mxs DMA mode:
>
> # time cat /sys/bus/iio/devices/iio\:device1/in_voltage0_raw
> 2631
> real 0m 0.12s
> user 0m 0.01s
> sys 0m 0.01s
>
>
> It seems fine for me.

I think I'm getting a little lost in these gazilions of i2c and lradc threads.
Can we not create one thread and keep the related stuff in there instead of
discussing it all around !?

Only one question comes to mind with this email -- what do LRADC and I2C have to
do with each other here ?

It'd be nice if someone could summarize on what I should focus and possibly
prepare a testcase.

Best regards,
Marek Vasut


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