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Subject[PATCH] [RFC] EHCI: add to memory barrier to updating hw_next
Date
Hi,

I have a missing urb completion problem on ARMv7 based platform.

I thought the above problem was caused by coherent memory between the
EHCI device and CPU so I tryied to allocates device type memory
for EHCI via dma_declare_coherent_memory at machine initialization step
so that EHCI always allocates from those device type memory.
It seems to solve the issue because I didn't see any problem.

But I am not sure it is acceptable solution. So I applied the patch
https://lkml.org/lkml/2011/8/31/344.
But it could not solve the problem so that I added another wmb()
as my patch, and now my platform works fine.

I am not sure what's the exact problem and what wmb I added could solve
but I just think the problem is related to store buffer flush of hw_next.
Anyway, important thing is that it fixed my problem so I expect
you expert guys could find what I am missing and a right solution.
IMHO, the patch might miss updating hw_next pointer.
Am I correct?

I understand the wmb() is just memory barrier, not write-buffer flush.
But it is true that wmb() can flush write buffer in ARM.
Anyhow I think that memory type, "normal memory, non-cacheable", may
have a problem for some devices that needs device type memory.

I cannot get conclusion from the discussion at
https://lkml.org/lkml/2011/8/31/344.
Which can I do for my platform, wmb() or dma_coherent_write_sync()?

Signed-off-by: Gioh Kim <gioh.kim@lge.com>
---
drivers/usb/host/ehci-q.c | 1 +
1 file changed, 1 insertion(+)

diff --git a/drivers/usb/host/ehci-q.c b/drivers/usb/host/ehci-q.c
index d34b399..779d9e8 100644
--- a/drivers/usb/host/ehci-q.c
+++ b/drivers/usb/host/ehci-q.c
@@ -501,6 +501,7 @@ qh_completions (struct ehci_hcd *ehci, struct ehci_qh *qh)
last = list_entry (qtd->qtd_list.prev,
struct ehci_qtd, qtd_list);
last->hw_next = qtd->hw_next;
+ wmb();
}

/* remove qtd; it's recycled after possible urb completion */
--
1.7.9.5


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