Messages in this thread | | | Date | Tue, 16 Jul 2013 15:13:54 -0700 | Subject | Re: [PATCH v5] x86: make sure IDT is page aligned | From | Yinghai Lu <> |
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On Tue, Jul 16, 2013 at 3:03 PM, H. Peter Anvin <hpa@zytor.com> wrote: > On 07/16/2013 01:47 PM, Kees Cook wrote:
>> The other IDTs don't need to be page aligned, but I marked them that >> way in the clean up because it seemed sensible to define these tables >> similarly. I can change the others to be __cacheline_aligned_bss if >> that's desired. >> > > I'm fine keeping them as page aligned. They are page-sized on x86-64 > anyway (half page on i386).
ok, then should change
> +/* No need to be aligned, but done to keep all IDTs defined the same way. */ > +gate_desc trace_idt_table[NR_VECTORS] __page_aligned_bss;
==>
> +/* Only need to be cacheline aligned, but keep all IDTs defined the same way to be page aligned. */ > +gate_desc trace_idt_table[NR_VECTORS] __page_aligned_bss;
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